diff --git a/_posts/2023-07-24-ft4232h-jtag.md b/_posts/2023-07-24-ft4232h-jtag.md new file mode 100644 index 0000000..0a7809e --- /dev/null +++ b/_posts/2023-07-24-ft4232h-jtag.md @@ -0,0 +1,16 @@ +--- +title: FT4232H JTAG +date: 2023-07-24 +categories: projects +excerpt: A breakout for the FT4232H so I can do JTAG/SWD. +header: + teaser: /assets/img/2023/ft4232h-jtag.jpg +--- + + + +I had a FT4232H leftover from my [Spartan 7 board](/2021/08/spartan-7-breakout/) and since it's never bad to have too many alternative programmers, I designed a breakout for it. It's got two debug interfaces configurable for either SWD or JTAG. It's also my first programmer that uses the standard pinout I'm using in all boards going forward (JTAG/SWD and UART in the same connector!). Even more, it has software controllable 3v3 rails which are on by default because the indicator LED doesn't add enough pulldown. The layout supports both the QFN and LQFP packages of the FT4232H for that supply chain flexibility. Overall, it was very much a "just works" kind of board. + +{% include figure image_path="/assets/img/2023/ft4232h-jtag.jpg" %} + +It looks like Xilinx now supports [converting normal FTDI devices](https://docs.xilinx.com/r/en-US/ug908-vivado-programming-debugging/Programming-FTDI-Devices-for-Vivado-Hardware-Manager-Support) into a programmer recognized by Vivado. No more need for stealing EEPROM data from existing programmers! diff --git a/assets/img/2023/ft4232h-jtag.jpg b/assets/img/2023/ft4232h-jtag.jpg new file mode 100644 index 0000000..aae48f2 Binary files /dev/null and b/assets/img/2023/ft4232h-jtag.jpg differ